A 60 GHz Phase Shifter Integrated With LNA and PA in 65 nm CMOS for Phased Array Systems

TitleA 60 GHz Phase Shifter Integrated With LNA and PA in 65 nm CMOS for Phased Array Systems
Publication TypeJournal Article
Year of Publication2010
AuthorsYu Y, Baltus PGM, de Graauw A, van der Heijden E, Vaucher CS, van Roermund AHM
JournalSolid-State Circuits, IEEE Journal of
Volume45
Pagination1697 -1709
Date Publishedsept.
ISSN0018-9200
Keywords4-bit digitally controlled RF phase shifter, antenna phased arrays, CMOS integrated circuits, CMOS technology, frequency 5.5 GHz, frequency 6.5 GHz, frequency 60 GHz, frequency 61 GHz, frequency 62 GHz, gain 12 dB, gain 7.7 dB, I-Q paths, LNA, low noise amplifiers, MMIC amplifiers, MMIC phase shifters, noise figure 7.2 dB, phased array systems, power 168 mW, power 78 mW, power amplifier, power amplifiers, programmable weighted combinations, size 65 nm, variable gain amplifiers
Abstract

This paper presents the design of a 60 GHz phase shifter integrated with a low-noise amplifier (LNA) and power amplifier (PA) in a 65 nm CMOS technology for phased array systems. The 4-bit digitally controlled RF phase shifter is based on programmable weighted combinations of I/Q paths using digitally controlled variable gain amplifiers (VGAs). With the combination of an LNA, a phase shifter and part of a combiner, each receiver path achieves 7.2 dB noise figure, a 360 #x00B0; phase shift range in steps of approximately 22.5 #x00B0;, an average insertion gain of 12 dB at 61 GHz, a 3 dB-bandwidth of 5.5 GHz and dissipates 78 mW. Consisting of a phase shifter and a PA, one transmitter path achieves a maximum output power of higher than +8.3 dBm, a 360 #x00B0; phase shift range in 22.5 #x00B0; steps, an average insertion gain of 7.7 dB at 62 GHz, a 3 dB-bandwidth of 6.5 GHz and dissipates 168 mW.

DOI10.1109/JSSC.2010.2051861